Download Analog-Baseband Architectures And Circuits For Multistandard by Pui-In Mak, Ben U Seng Pan, Rui Paulo Martins PDF

By Pui-In Mak, Ben U Seng Pan, Rui Paulo Martins

ISBN-10: 1402064322

ISBN-13: 9781402064326

With the earlier few decade efforts on lithography and integrated-circuit (IC) applied sciences, very reasonably cheap microsystems were effectively constructed for plenty of assorted purposes. the fashion in instant communications is towards making a networkubiquitous period within the future years. Many exceptional possibilities and demanding situations, resembling layout for multi-standardability and low-voltage (LV) compliance, are quickly changing into the mainstream instructions in wireless-IC examine and improvement, provided that the previous can provide the simplest connectivity between diverse networks, whereas the latter can facilitate the expertise migration into the sub-1-V nanoscale regimes for extra rate and tool aid.

Analog-Baseband Architecturees and Circuits presents architectural and circuit strategies for instant transceivers to accomplish multistandard and low-voltage compliance. the 1st a part of the ebook experiences the actual layer requisites of contemporary instant verbal exchange criteria, provides the basic tradeoffs eager about transceiver structure choice, and offers case reports of the cutting-edge multistandard transceivers, the place the main suggestions strengthened are highlighted and mentioned. A statistical precis (with a hundred+ references brought up) of such a lot used transmitter and receiver architectures for contemporary communique criteria is equipped. the entire references are citied from the major boards, i.e., ISSCC, CICC, VLSI and ESSCIRC, from 1997 to 2005.

The moment half specializes in the architectural layout of multistandard transceivers. A coarse-RF fine-IF (two-step) channelselection method is disclosed. It, throughout the reconfiguration of receiver and transmitter analog basebands, permits not just a leisure of the RF frequency synthesizer’s and native oscillator’s layout necessities, but additionally a good multistandard compliance by way of synthesizing the low-IF and zero-IF within the receiver; and the direct-up and two-step-up within the transmitter. the primary is proven in few layout examples. one in all them is a system-in-a-package (SiP) receiver analog baseband for IEEE 802.11a/b/g WLAN. It not just has the two-step channel choice embedded, but in addition encompasses a flexible-IF topology, a distinct 3D-stack floorplan, and a specific layout method for top testability and routability.

The 3rd half bargains with the circuit layout. as well as the methodical description of many LV circuit innovations, three tailormade LV-robust practical blocks are offered. They comprise: 1) a double-quadrature-downconversion clear out (DQDF) – it realizes simultaneously clock-rate-defined IF reception, I/Q demodulation, IF channel choice and baseband filtering. 2) A switched-current-resistor (SCR) programmable-gain amplifier (PGA) – it bargains a transient-free constant-bandwidth achieve adjustment. three) An inside-OpAmp dc-offset canceler – it saves the silicon sector required for understanding a wide time consistent on chip whereas maximizing its highpass-pole switchability for speedy dc-offset transient.

The final half offers experimental result of the three tailored development blocks and a fully-integrated analog-baseband IC fabricated in a standard-VTH CMOS procedure. formerly untold on-/off-chip co-setup for either full-chip and construction blocks measurements are defined. not just the development blocks have effectively prolonged the state of the art boundary by way of sign bandwidth and provide voltage, the analog-baseband IC has been up to now the lowest-voltage-reported resolution for IEEE 802.11a/b/g WLAN receivers.

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2003. I. Ahmed and D. Johns, “A 50MS/s (35mW) to 1kS/s (15µW) Power Scaleable 10b Pipelined ADC with Minimal Bias Current Variation,” IEEE International SolidState Circuits Conference (ISSCC), Digest of Technical Papers, pp. 280–281, Feb. 2005. B. Xia, A. Valdes-Garcia and E. Sánchez-Sinencio, “A Configurable TimeInterleaved Pipeline ADC for Multi-Standard Wireless Receivers,” in Proc. European Solid-State Circuits Conference (ESSCIRC), pp. 259–262, Sept. 2004. -I. -P. U and R. P. Martins, “Transceiver Architectural Selection: Review, State-of-the-Art Survey and Case Study,” IEEE Circuits and Systems Magazine, 2nd Issue, pp.

With the Gaussian minimum shift keying (GMSK) as the modulation method; a time-division 200-kHz channel can deliver a data rate of 270 kb/s. 6] architecture have all been tried. 18 Analog-Baseband Architectures and Circuits The TX typically follows the RX in architecture to share the SAW filter (if any) and frequency synthesizing components. 2] using a zero-IF/low-IF RX with a direct-up TX. In addition to them, there are other possible types of TX. 8 GHz) to realize a dual-mode solution. 19] modulation-based TXs are also possible due to the constant amplitude of GMSK signal.

Brenna, D. Tschopp and Q. Huang, “Carrier Leakage Suppression in DirectConversion WCDMA Transmitters,” IEEE International Solid-State Circuits Conference (ISSCC), Digest of Technical Papers, pp. 270–271, Feb. 2003. 37] V. 25μm SiGe BiCMOS,” IEEE International Solid-State Circuits Conference (ISSCC), Digest of Technical Papers, pp. 182–183, Feb. 2004. 38] H. 18μm CMOS,” IEEE International Solid-State Circuits Conference (ISSCC), Digest of Technical Papers, pp. 96–97, Feb. 2005. 39] P. 11b Wireless LAN,” IEEE International Solid-State Circuits Conference (ISSCC), Digest of Technical Papers, pp.

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